The interface that facilitates the process of generating code for instrumentation procedures. More...

#include <igt_gen_coder.h>

Public Member Functions
virtual IGtInsFactory &	InstructionFactory () const =0
	Get IGtInsFactory interface that can be used to create instructions in the instrumentation procedures.
virtual IGtVregFactory &	VregFactory () const =0
	Get IGtVregFactory interface to the container of virtual registers in the instrumentation procedures.
virtual IGtRegAllocator &	RegAllocator () const =0
	Get IGtRegAllocator interface to the allocator of virtual registers in the instrumentation procedures.
virtual const IGtGenModel &	GenModel () const =0
	Return GEN model of the code generated by this object.
virtual GtMemoryAddrModel	ProfileBufferAddrModel () const =0
	Return address model of profile buffer accesses.
virtual void	StartTimer (IGtGenProcedure &proc, const GtReg &timerReg, const GtPredicate &predicate=GtPredicate()) const =0
	Generate code that stores current value of TimeStampReg in the specified GRF register.
virtual void	StartPerfmon (IGtGenProcedure &proc, const GtReg &perfReg, const GtPredicate &predicate=GtPredicate()) const =0
	Generate code that stores current value of PerfMonReg in the specified GRF register.
virtual void	StopTimer (IGtGenProcedure &proc, const GtReg &timerReg, const GtPredicate &predicate=GtPredicate()) const =0
	Generate code that computes elapsed time - difference between current value of TimeStampReg and value stored in the specified GRF register.
virtual void	StopPerfmon (IGtGenProcedure &proc, const GtReg &perfReg, const GtPredicate &predicate=GtPredicate()) const =0
	Generate code that computes elapsed time - difference between current value of PerfMonReg and value stored in the specified GRF register.
virtual void	StopTimerExt (IGtGenProcedure &proc, const GtReg &timerReg) const =0
	Similar to StopTimer, but additionally checks for the time counter overflow.
virtual void	StopPerfmonExt (IGtGenProcedure &proc, const GtReg &perfReg) const =0
	Similar to StopPerfmon, but additionally checks for the perfomon counter overflow.
virtual void	ComputeAddress (IGtGenProcedure &proc, const GtReg &addrReg, uint32_t offset, const GtPredicate &predicate=GtPredicate()) const =0
	Given offset within a profile buffer, generate code that computes address payload for instruction that accesses the corresponding location.
virtual void	ComputeAddress (IGtGenProcedure &proc, const GtReg &addrReg, const GtReg &offsetReg, const GtPredicate &predicate=GtPredicate()) const =0
	Given offset within a profile buffer, generate code that computes address payload for instruction that accesses the corresponding location.
virtual void	ComputeRelAddress (IGtGenProcedure &proc, const GtReg &addrReg, const GtReg &baseReg, int32_t offset, const GtPredicate &predicate=GtPredicate()) const =0
	Generate code that computes the sum of the specified base address and the specified offset.
virtual void	ComputeRelAddress (IGtGenProcedure &proc, const GtReg &addrReg, const GtReg &baseReg, const GtReg &offsetReg, const GtPredicate &predicate=GtPredicate()) const =0
	Generate code that computes the sum of the specified base address and the specified offset.
virtual void	ComputeThreadChunkOffset (IGtGenProcedure &proc, const GtReg &offsetReg, uint32_t numThreadBuckets, uint32_t chunkSize, uint32_t baseOffset=0, uint32_t offsetInChunk=0, const GtPredicate &predicate=GtPredicate()) const =0
	Generate code that computes offset within a memory chunk of the current thread bucket (.
virtual void	ComputeThreadChunkAddress (IGtGenProcedure &proc, const GtReg &addrReg, uint32_t numThreadBuckets, uint32_t chunkSize, uint32_t baseOffset=0, uint32_t offsetInChunk=0, const GtPredicate &predicate=GtPredicate()) const =0
	Generate code that computes address within a memory chunk of the current thread bucket (.
virtual void	ComputeSimdMask (IGtGenProcedure &proc, const GtReg &simdMaskReg, bool ignoreCeMask, uint32_t execMask, const GtPredicate &predicate=GtPredicate()) const =0
	Generate code that computes the mask of effective SIMD channels at the point where the procedure is executed.
virtual void	GenerateFakeSrcConsumers (IGtGenProcedure &proc, const IGtIns &ins, const GtPredicate &predicate=GtPredicate()) const =0
	Generate code that does not change the architectural state but consumes (reads) source registers of the specified instruction.
virtual void	GenerateFakeDstConsumers (IGtGenProcedure &proc, const IGtIns &ins, const GtPredicate &predicate=GtPredicate()) const =0
	Generate code that does not change the architectural state but consumes (reads) destination registers of the specified instruction.
virtual void	StoreMemBlock (IGtGenProcedure &proc, const GtReg &addrReg, const GtReg &baseDataReg, uint32_t dataSize, const GtPredicate &predicate=GtPredicate(), uint32_t execSize=1) const =0
	Generate code that stores block of data to the profile buffer.
virtual void	LoadMemBlock (IGtGenProcedure &proc, const GtReg &addrReg, const GtReg &baseDataReg, uint32_t dataSize, const GtPredicate &predicate=GtPredicate(), uint32_t execSize=1) const =0
	Generate code that loads block of data from the profile buffer.
virtual uint32_t	MaxMemBlockSize () const =0
	Get maximum size of the load/store block, in bytes.
virtual void	LoadTileId (IGtGenProcedure &proc, const GtReg &tileIdReg, const GtPredicate &predicate=GtPredicate()) const =0
	Generate code that assigns sub-device (tile) ID to the specified register.
virtual bool	IsTileIdSupported () const =0
	Return true if SW platform associated with this code generator supports tile identification.
virtual void	GenerateHliCall (IGtGenProcedure &proc, const char funcName, const IGtIret ret, const GtIargSpan &args, GtHliCallStd callStd=GtHliCallStd::IGC_STACK, bool hasComboParam=false, const GtPredicate &predicate=GtPredicate()) const =0
virtual void	GetTid (IGtGenProcedure &proc, const GtReg &tidReg, const GtPredicate &predicate=GtPredicate()) const =0
virtual void	GetDssId (IGtGenProcedure &proc, const GtReg &dssReg, const GtPredicate &predicate=GtPredicate()) const =0
virtual void	GetFfTid (IGtGenProcedure &proc, const GtReg &ffTidReg, const GtPredicate &predicate=GtPredicate()) const =0
virtual void	StoreRegRange (IGtGenProcedure &proc, const GtReg &addrReg, GtRegNum firstReg, uint32_t numRegs, const GtPredicate &predicate=GtPredicate()) const =0
	Generate code that stores the specified range of GRF registers in the specified memory buffer.
virtual void	LoadRegRange (IGtGenProcedure &proc, const GtReg &addrReg, GtRegNum firstReg, uint32_t numRegs, const GtPredicate &predicate=GtPredicate()) const =0
	Generate code that loads the specified range of GRF registers from the specified memory buffer.
virtual void	StorePayloadAddresses (IGtGenProcedure &proc, const GtReg &bufferPtrReg, const IGtIns &sendIns, const GtPredicate &predicate) const =0
virtual void	ConvertToConditionalProcedure (const IGtGenProcedure &proc, IGtGenProcedure &condProc, const GtReg &condReg) const =0
virtual void	GenerateConditionalProcedure (const IGtGenProcedure &proc, IGtGenProcedure &condProc, const GtCondModifier &condMode, const GtReg &srcReg0, const GtReg &srcReg1) const =0
	Generate procedure that will calculate a condition between two virtual registers and convert the given procedure into conditional based of the condition's value. The condition that will be calculated depends on the condition modifier.
virtual void	GenerateConditionalProcedure (const IGtGenProcedure &proc, IGtGenProcedure &condProc, const GtCondModifier &condMode, const GtReg &srcReg, uint32_t val) const =0
	Generate procedure that will calculate a condition between a virtual registers and an immediate and convert the given procedure into conditional based of the condition's value. The condition that will be calculated depends on the condition modifier.

Detailed Description

The interface that facilitates the process of generating code for instrumentation procedures.

GTPin tools mainly use IGtGenCoder interface to generate predefined inline subroutines and insert them into instrumentation procedures. They receive the IGtGenCoder object along with the IGtKernelInstrument object when GTPin invokes the IGtTool::OnKernelBuild function (

See also:: IGtKernelInstrument::Coder()).

Availability:

IGtTool::OnKernelBuild

Member Function Documentation

virtual void gtpin::IGtGenCoder::ComputeAddress	(	IGtGenProcedure &	proc,
		const GtReg &	addrReg,
		uint32_t	offset,
		const GtPredicate &	predicate = `GtPredicate()`
	)		const `[pure virtual]`

Given offset within a profile buffer, generate code that computes address payload for instruction that accesses the corresponding location.

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	addrReg	Register that receives the calculated address
[in]	offset	32-bit offset within the profile buffer
[in]	predicate	Predicate of the generated code. Invalid predicate is ignored

virtual void gtpin::IGtGenCoder::ComputeAddress	(	IGtGenProcedure &	proc,
		const GtReg &	addrReg,
		const GtReg &	offsetReg,
		const GtPredicate &	predicate = `GtPredicate()`
	)		const `[pure virtual]`

Given offset within a profile buffer, generate code that computes address payload for instruction that accesses the corresponding location.

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	addrReg	Register that receives the calculated address
[in]	offsetReg	32-bit register that holds offset within the buffer
[in]	predicate	Predicate of the generated code. Invalid predicate is ignored

virtual void gtpin::IGtGenCoder::ComputeRelAddress	(	IGtGenProcedure &	proc,
		const GtReg &	addrReg,
		const GtReg &	baseReg,
		int32_t	offset,
		const GtPredicate &	predicate = `GtPredicate()`
	)		const `[pure virtual]`

Generate code that computes the sum of the specified base address and the specified offset.

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	addrReg	Register that receives the calculated address
[in]	baseReg	Register that holds an address within the profile buffer
[in]	offset	32-bit offset relative to the base address
[in]	predicate	Predicate of the generated code. Invalid predicate is ignored

virtual void gtpin::IGtGenCoder::ComputeRelAddress	(	IGtGenProcedure &	proc,
		const GtReg &	addrReg,
		const GtReg &	baseReg,
		const GtReg &	offsetReg,
		const GtPredicate &	predicate = `GtPredicate()`
	)		const `[pure virtual]`

Generate code that computes the sum of the specified base address and the specified offset.

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	addrReg	Register that receives the calculated address
[in]	baseReg	Register that holds an address within the profile buffer
[in]	offsetReg	32-bit register that holds offset relative to the base address
[in]	predicate	Predicate of the generated code. Invalid predicate is ignored

virtual void gtpin::IGtGenCoder::ComputeSimdMask	(	IGtGenProcedure &	proc,
		const GtReg &	simdMaskReg,
		bool	ignoreCeMask,
		uint32_t	execMask,
		const GtPredicate &	predicate = `GtPredicate()`
	)		const `[pure virtual]`

Generate code that computes the mask of effective SIMD channels at the point where the procedure is executed.

ceMask = ignoreCeMask ? 0xffffffff : ChannelEnableReg() simdMaskReg = ceMask & DispatchMaskReg() & execMask & Mask(predicate)

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	simdMaskReg	32-bit register that receives the mask of effective SIMD channels
[in]	ignoreCeMask	Flag that indicates whether the mask in ChannelEnableReg should be applied (false) or ignored (true) in the computation of effective SIMD channels
[in]	execMask	Execution mask to be used in the computation of effective SIMD channels. Normally, this mask is produced by the GtExecMask::Bits() function.
[in]	predicate	Predicate to be used in the computation. Invalid predicate is ignored

virtual void gtpin::IGtGenCoder::ComputeThreadChunkAddress	(	IGtGenProcedure &	proc,
		const GtReg &	addrReg,
		uint32_t	numThreadBuckets,
		uint32_t	chunkSize,
		uint32_t	baseOffset = `0`,
		uint32_t	offsetInChunk = `0`,
		const GtPredicate &	predicate = `GtPredicate()`
	)		const `[pure virtual]`

Generate code that computes address within a memory chunk of the current thread bucket (.

See also:: GtProfileArray)

virtual void gtpin::IGtGenCoder::ComputeThreadChunkOffset	(	IGtGenProcedure &	proc,
		const GtReg &	offsetReg,
		uint32_t	numThreadBuckets,
		uint32_t	chunkSize,
		uint32_t	baseOffset = `0`,
		uint32_t	offsetInChunk = `0`,
		const GtPredicate &	predicate = `GtPredicate()`
	)		const `[pure virtual]`

Generate code that computes offset within a memory chunk of the current thread bucket (.

See also:: GtProfileArray)

Note:: If offsetInChunk = 0, the generated code computes offset/address of the memory chunk associated with the currently running HW thread, relative to the profile buffer base.

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	offsetReg	32-bit register that receives the calculated offset within the profile buffer
[in]	addrReg	Register that receives the calculated address
[in]	numThreadBuckets	Number of thread buckets
[in]	chunkSize	Size of the per-bucket chunk, in bytes
[in]	baseOffset	Offset of the array of chunks within the profile buffer
[in]	offsetInChunk	Offset of the location within the chunk
[in]	predicate	Predicate of the generated code. Invalid predicate is ignored

Precondition:: IsPower2(numThreadBuckets) && IsPower2(chunkSize)

virtual void gtpin::IGtGenCoder::ConvertToConditionalProcedure	(	const IGtGenProcedure &	proc,
		IGtGenProcedure &	condProc,
		const GtReg &	condReg
	)		const `[pure virtual]`

Convert a given procedure into a conditional procedure that will be executed based on the value of the specified register.

Note:: If 'proc' consists of the following code: ins1 ins2 ... insN

Then the resulted procedure will be: pred = condReg; (pred) ins1 (pred) ins2 ... (pred) insN

Parameters:

[in]	proc	Procedure that holds the code that will be converted to conditional
[out]	condProc	Procedure, the generated conditional code will be appended to
[in]	condReg	Register that holds the value for the predicate

Precondition:: 'proc' does not contain an instruction that is using ARF register f1.0.

virtual void gtpin::IGtGenCoder::GenerateConditionalProcedure	(	const IGtGenProcedure &	proc,
		IGtGenProcedure &	condProc,
		const GtCondModifier &	condMode,
		const GtReg &	srcReg0,
		const GtReg &	srcReg1
	)		const `[pure virtual]`

Generate procedure that will calculate a condition between two virtual registers and convert the given procedure into conditional based of the condition's value. The condition that will be calculated depends on the condition modifier.

Note:: If 'proc' consists of the following code: ins1 ins2 ... insN

Then the resulted procedure will be: pred = srcReg0 COND srcReg1; (pred) ins1 (pred) ins2 ... (pred) insN

Where 'condMode' can be one of the following: GED_COND_MODIFIER_z : srcReg0 == srcReg1 GED_COND_MODIFIER_nz : srcReg0 != srcReg1 GED_COND_MODIFIER_g : srcReg0 > srcReg1 GED_COND_MODIFIER_ge : srcReg0 >= srcReg1 GED_COND_MODIFIER_l : srcReg0 < srcReg1 GED_COND_MODIFIER_le : srcReg0 <= srcReg1

Parameters:

[in]	proc	Procedure that holds the code that will be converted to conditional
[out]	condProc	Procedure, the generated code will be appended to
[in]	condMode	Condition modifier for the CMP instruction
[in]	srcReg0	virtual register that will be used for the condition
[in]	srcReg1	virtual register that will be used for the condition

Precondition:: 'proc' does not contain an instruction that is using ARF register f1.0.

virtual void gtpin::IGtGenCoder::GenerateConditionalProcedure	(	const IGtGenProcedure &	proc,
		IGtGenProcedure &	condProc,
		const GtCondModifier &	condMode,
		const GtReg &	srcReg,
		uint32_t	val
	)		const `[pure virtual]`

Generate procedure that will calculate a condition between a virtual registers and an immediate and convert the given procedure into conditional based of the condition's value. The condition that will be calculated depends on the condition modifier.

Note:: If 'proc' consists of the following code: ins1 ins2 ... insN

Then the resulted procedure will be: pred = srcReg COND val; (pred) ins1 (pred) ins2 ... (pred) insN

Where 'condMode' can be one of the following: GED_COND_MODIFIER_z : srcReg == val GED_COND_MODIFIER_nz : srcReg != val GED_COND_MODIFIER_g : srcReg > val GED_COND_MODIFIER_ge : srcReg >= val GED_COND_MODIFIER_l : srcReg < val GED_COND_MODIFIER_le : srcReg <= val

Parameters:

[in]	proc	Procedure that holds the code that will be converted to conditional
[out]	condProc	Procedure, the generated code will be appended to
[in]	condMode	Condition modifier for the CMP instruction
[in]	srcReg	Virtual register that will be used for the condition
[in]	val	Immediate that will be used for the condition

Precondition:: 'proc' does not contain an instruction that is using ARF register f1.0.

virtual void gtpin::IGtGenCoder::GenerateFakeDstConsumers	(	IGtGenProcedure &	proc,
		const IGtIns &	ins,
		const GtPredicate &	predicate = `GtPredicate()`
	)		const `[pure virtual]`

Generate code that does not change the architectural state but consumes (reads) destination registers of the specified instruction.

This functions can be used to expose latency of instructions waiting for register values produced by other instructions.

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	ins	Instruction whose register operands are consumed
[in]	predicate	Predicate of the generated code. Invalid predicate is ignored

virtual void gtpin::IGtGenCoder::GenerateFakeSrcConsumers	(	IGtGenProcedure &	proc,
		const IGtIns &	ins,
		const GtPredicate &	predicate = `GtPredicate()`
	)		const `[pure virtual]`

Generate code that does not change the architectural state but consumes (reads) source registers of the specified instruction.

This functions can be used to expose latency of instructions waiting for register values produced by other instructions.

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	ins	Instruction whose register operands are consumed
[in]	predicate	Predicate of the generated code. Invalid predicate is ignored

virtual void gtpin::IGtGenCoder::GenerateHliCall	(	IGtGenProcedure &	proc,
		const char *	funcName,
		const IGtIret *	ret,
		const GtIargSpan &	args,
		GtHliCallStd	callStd = `GtHliCallStd::IGC_STACK`,
		bool	hasComboParam = `false`,
		const GtPredicate &	predicate = `GtPredicate()`
	)		const `[pure virtual]`

Generate code that calls the specified HLI function with the specified argument values

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	funcName	The name of the HLI function
[in]	ret	Descriptor of the return value of the HLI function, or nullptr
[in]	args	Span of pointers to IGtIarg objects that represent arguments of the HLI function
[in]	callStd	The calling convention of the HLI function
[in]	hasComboParam	true - the function has a single parameter pointing to the array of argument values on stack false - the function has a dedicated parameter for each argument value
[in]	predicate	Predicate of the generated code. Invalid predicate is ignored

virtual void gtpin::IGtGenCoder::GetDssId	(	IGtGenProcedure &	proc,
		const GtReg &	dssReg,
		const GtPredicate &	predicate = `GtPredicate()`
	)		const `[pure virtual]`

Generate code that assigns current global DualSubSliceID

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	dssReg	Register that receives the global DSS value
[in]	predicate	Predicate of the generated code. Invalid predicate is ignored

virtual void gtpin::IGtGenCoder::GetFfTid	(	IGtGenProcedure &	proc,
		const GtReg &	ffTidReg,
		const GtPredicate &	predicate = `GtPredicate()`
	)		const `[pure virtual]`

Generate code that assigns current Fixed Function Thread ID (FFTID) to the specified register

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	ffTidReg	Register that receives the FFTID value
[in]	predicate	Predicate of the generated code. Invalid predicate is ignored

virtual void gtpin::IGtGenCoder::GetTid	(	IGtGenProcedure &	proc,
		const GtReg &	tidReg,
		const GtPredicate &	predicate = `GtPredicate()`
	)		const `[pure virtual]`

Generate code that assigns current Thread ID (TID) to the specified register

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	tidReg	Register that receives the TID value
[in]	predicate	Predicate of the generated code. Invalid predicate is ignored

virtual IGtInsFactory& gtpin::IGtGenCoder::InstructionFactory ( ) const [pure virtual]

Get IGtInsFactory interface that can be used to create instructions in the instrumentation procedures.

Returns:: Instruction factory associated with this object

virtual void gtpin::IGtGenCoder::LoadMemBlock	(	IGtGenProcedure &	proc,
		const GtReg &	addrReg,
		const GtReg &	baseDataReg,
		uint32_t	dataSize,
		const GtPredicate &	predicate = `GtPredicate()`,
		uint32_t	execSize = `1`
	)		const `[pure virtual]`

Generate code that loads block of data from the profile buffer.

virtual void gtpin::IGtGenCoder::LoadRegRange	(	IGtGenProcedure &	proc,
		const GtReg &	addrReg,
		GtRegNum	firstReg,
		uint32_t	numRegs,
		const GtPredicate &	predicate = `GtPredicate()`
	)		const `[pure virtual]`

Generate code that loads the specified range of GRF registers from the specified memory buffer.

The code generated by this function advances the addrReg by numRegs*GrfRegSize(), so that addrReg will point to the location just after the loaded memory range

The code generated by this function advances the addrReg by numRegs*GrfRegSize(), so that addrReg will point to the location just after the stored memory range

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	addrReg	Register that specifies base address of the memory buffer
[in]	firstRegNum	First GRF register to be stored
[in]	numRegs	Number of registers to be stored
[in]	predicate	Predicate of the generated code. Invalid predicate is ignored

virtual void gtpin::IGtGenCoder::LoadTileId	(	IGtGenProcedure &	proc,
		const GtReg &	tileIdReg,
		const GtPredicate &	predicate = `GtPredicate()`
	)		const `[pure virtual]`

Generate code that assigns sub-device (tile) ID to the specified register.

If SW platform associated with this code generator does not support tile identification (see IsTileIdSupported()), the register is zero-initialized.

Note:: Since tile ID is a per-thread constant, its value can be loaded in a dedicated virtual register once (at kernel entry), and then, shared by multiple instrumentation procedures without re-loading.

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	tileIdReg	Register that receives tile ID
[in]	predicate	Predicate of the generated code. Invalid predicate is ignored

virtual uint32_t gtpin::IGtGenCoder::MaxMemBlockSize ( ) const [pure virtual]

Get maximum size of the load/store block, in bytes.

Returns:: Maximum number of bytes in the memory block that can be accessed by the StoreMemBlock/LoadMemBlock procedure

Postcondition:: The returned value is a power-of-2

virtual IGtRegAllocator& gtpin::IGtGenCoder::RegAllocator ( ) const [pure virtual]

Get IGtRegAllocator interface to the allocator of virtual registers in the instrumentation procedures.

Returns:: Register allocator associated with this object

virtual void gtpin::IGtGenCoder::StartPerfmon	(	IGtGenProcedure &	proc,
		const GtReg &	perfReg,
		const GtPredicate &	predicate = `GtPredicate()`
	)		const `[pure virtual]`

Generate code that stores current value of PerfMonReg in the specified GRF register.

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	timerReg	Register that receives the TimeStampReg value
[in]	perfReg	Register that receives the PerfMonReg value
[in]	predicate	Predicate of the generated code. Invalid predicate is ignored

virtual void gtpin::IGtGenCoder::StartTimer	(	IGtGenProcedure &	proc,
		const GtReg &	timerReg,
		const GtPredicate &	predicate = `GtPredicate()`
	)		const `[pure virtual]`

Generate code that stores current value of TimeStampReg in the specified GRF register.

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	timerReg	Register that receives the TimeStampReg value
[in]	perfReg	Register that receives the PerfMonReg value
[in]	predicate	Predicate of the generated code. Invalid predicate is ignored

virtual void gtpin::IGtGenCoder::StopPerfmon	(	IGtGenProcedure &	proc,
		const GtReg &	perfReg,
		const GtPredicate &	predicate = `GtPredicate()`
	)		const `[pure virtual]`

Generate code that computes elapsed time - difference between current value of PerfMonReg and value stored in the specified GRF register.

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	timerReg	Register that receives the (TimeStampReg - timerReg) value
[in]	perfReg	Register that receives the (PerfMonReg - perfReg) value
[in]	predicate	Predicate of the generated code. Invalid predicate is ignored

virtual void gtpin::IGtGenCoder::StopPerfmonExt	(	IGtGenProcedure &	proc,
		const GtReg &	perfReg
	)		const `[pure virtual]`

Similar to StopPerfmon, but additionally checks for the perfomon counter overflow.

In case of overflow, the generated code sets f0.0:uw bits on, and assigns zero value to timerReg/perfReg. Otherwise, the f0.0:uw bits are cleared off, and the elapsed time is stored in timerReg/perfReg.

virtual void gtpin::IGtGenCoder::StopTimer	(	IGtGenProcedure &	proc,
		const GtReg &	timerReg,
		const GtPredicate &	predicate = `GtPredicate()`
	)		const `[pure virtual]`

Generate code that computes elapsed time - difference between current value of TimeStampReg and value stored in the specified GRF register.

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	timerReg	Register that receives the (TimeStampReg - timerReg) value
[in]	perfReg	Register that receives the (PerfMonReg - perfReg) value
[in]	predicate	Predicate of the generated code. Invalid predicate is ignored

virtual void gtpin::IGtGenCoder::StopTimerExt	(	IGtGenProcedure &	proc,
		const GtReg &	timerReg
	)		const `[pure virtual]`

Similar to StopTimer, but additionally checks for the time counter overflow.

In case of overflow, the generated code sets f0.0:uw bits on, and assigns zero value to timerReg/perfReg. Otherwise, the f0.0:uw bits are cleared off, and the elapsed time is stored in timerReg/perfReg.

virtual void gtpin::IGtGenCoder::StoreMemBlock	(	IGtGenProcedure &	proc,
		const GtReg &	addrReg,
		const GtReg &	baseDataReg,
		uint32_t	dataSize,
		const GtPredicate &	predicate = `GtPredicate()`,
		uint32_t	execSize = `1`
	)		const `[pure virtual]`

Generate code that stores block of data to the profile buffer.

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	addrReg	Register that specifies memory address to be accessed
[in]	baseDataReg	The base of the register range that receives/holds the data being read/written
[in]	dataSize	Data size in bytes
[in]	predicate	Predicate of the generated code. Invalid predicate is ignored

Precondition:: dataSize is a power-of-2 integer in the interval [16, MaxMemBlockSize()]; addrReg and baseDataReg registers are zero-aligned: GtReg::SubRegNum() == 0 for physical register, and IGtVreg::RequiredSubregNum() == 0 for virtual register. Virtual registers created by MakeMsgAddrScratch() and MakeMsgDataScratch() satisfy this requirement.

virtual void gtpin::IGtGenCoder::StorePayloadAddresses	(	IGtGenProcedure &	proc,
		const GtReg &	bufferPtrReg,
		const IGtIns &	sendIns,
		const GtPredicate &	predicate
	)		const `[pure virtual]`

Generate code that stores address payload of the specified SEND instruction in the specified buffer.

The code generated by this function advances the addrReg by numRegs*GrfRegSize(), so that addrReg will point to the location just after the stored memory range.

Note:: The address payload includes all addresses of the SEND message, even those that could be disabled by the channel execution mask.

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	bufferPtrReg	Register that points to the output buffer
[in]	sendIns	SEND instruction whose address payload is queried
[in]	predicate	Predicate of the generated code. Invalid predicate is ignored

virtual void gtpin::IGtGenCoder::StoreRegRange	(	IGtGenProcedure &	proc,
		const GtReg &	addrReg,
		GtRegNum	firstReg,
		uint32_t	numRegs,
		const GtPredicate &	predicate = `GtPredicate()`
	)		const `[pure virtual]`

Generate code that stores the specified range of GRF registers in the specified memory buffer.

The code generated by this function advances the addrReg by numRegs*GrfRegSize(), so that addrReg will point to the location just after the stored memory range

Parameters:

[in]	proc	Procedure, the generated code is appended to
[in]	addrReg	Register that specifies base address of the memory buffer
[in]	firstRegNum	First GRF register to be stored
[in]	numRegs	Number of registers to be stored
[in]	predicate	Predicate of the generated code. Invalid predicate is ignored

virtual IGtVregFactory& gtpin::IGtGenCoder::VregFactory ( ) const [pure virtual]

Get IGtVregFactory interface to the container of virtual registers in the instrumentation procedures.

Returns:: Factory of virtual registers associated with this object

Public Member Functions

Detailed Description

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